WB1.5 The Chip-Multithreading Architecture and Parallel Optical Interconnects
Optical interconnects & VLSI photonics ; 2004 ; San Diego, Calif
2004-01-01
2 pages
IEEE cat. no. 04TH8728. Held as part of the 2004 IEEE/LEOS Summer topical meeting
Conference paper
English
© Metadata Copyright the British Library Board and other contributors. All rights reserved.
Three-dimensional micro-optical architecture for chip-level optical interconnects [4292-31]
British Library Conference Proceedings | 2001
|Parallel Optical Network Interconnects
British Library Conference Proceedings | 1999
|Applications of parallel optical interconnects
IEEE | 1996
|Optical chip-to-chip interconnects for memory systems
IEEE | 2003
|