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    Title :

    Optimal Speed-Up Parallel Image Template Matching Algorithms on Processor Arrays with a Reconfigurable Bus System


    Contributors:
    Tsai, H.-R. (author) / Horng, S.-J. (author) / Tsai, S.-S. (author) / Lee, S.-S. (author) / Kao, T.-W. (author) / Chen, C.-H. (author)

    Published in:

    Publication date :

    1998-01-01


    Size :

    20 pages



    Type of media :

    Article (Journal)


    Type of material :

    Print


    Language :

    English


    Classification :

    DDC:    621.399




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