A spacecraft computing system, including: a first processor configured to process data from a payload and a first spacecraft system; a second processor configured to process data from a second spacecraft system; an interface connected to the second processor configured to interface with a third spacecraft system, wherein the second processor is configured to monitor the first processor and to initiate the recovery of the first processor when the first processor experiences a fault, wherein the first processor's processing capacity is greater the second processor's processing capacity, and wherein the second processor is more reliable than the first processor.


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    Title :

    Small spacecraft processing and bus architecture


    Contributors:

    Publication date :

    2024-12-31


    Type of media :

    Patent


    Type of material :

    Electronic Resource


    Language :

    English


    Classification :

    IPC:    B64G Raumfahrt , COSMONAUTICS / G06F ELECTRIC DIGITAL DATA PROCESSING , Elektrische digitale Datenverarbeitung



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    Spacecraft Architecture

    V. V. Zefeld | NTIS | 1986



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