Aspects of the disclosure include a symmetric direct current (DC) link capacitor having a low parasitic equivalent series L-inductance (ESL). An exemplary capacitor can include one or more positive-dielectric-negative (PDN) stacks having a positive layer, a negative layer, and a dielectric layer between the positive layer and the negative layer. A first contact layer is electrically coupled to the positive layer on a sidewall of the one or more PDN stacks and a second contact layer is electrically coupled to the negative layer on the sidewall of the one or more PDN stacks. A positive terminal is electrically coupled to the first contact layer and a negative terminal is electrically coupled to the second contact layer.
LOW PARASITIC EQUIVALENT SERIES L-INDUCTANCE (ESL) SYMMETRIC DIRECT CURRENT (DC) LINK CAPACITOR
2024-10-31
Patent
Electronic Resource
English
Low parasitic equivalent series L-inductor symmetric DC link capacitor
European Patent Office | 2024
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