A major problem in phase-locked loop (PLL) design is to meet the requirements of both fast signal acquisition and good synchronous mode performance. This relation is reviewed for different types of phase comparators. As a result a new phase-and-frequency comparator is proposed. This comparator is based on an up-down counter principle and can be considered as an adaptive acquisition control circuit. The analysis of a PLL with the proposed phase comparator is based on an exact calculation method for the pull-in time. It is shown that fast signal acquisition is possible without affecting the filtering properties of the loop. Experimental results are given of the acquisition behavior of a second-order type-2 loop which show a good correspondence with the theoretical analysis.


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    Title :

    Improved Phase-Locked Loop Performance with Adaptive Phase Comparators


    Contributors:

    Published in:

    Publication date :

    1982-05-01


    Size :

    3054256 byte




    Type of media :

    Article (Journal)


    Type of material :

    Electronic Resource


    Language :

    English



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