A built-in-test (BIT) strategy is developed, aided by the reliability models of MIL-HDBK-217E. This development results in the consideration of device and system failure rate distributions along with system application and environment in deciding where and what type of BIT to implement. In particular, it is shown that failures of electronic circuits can be attributed to both gate- and package-related failures and that the BIT strategy must take this failure distribution into account. A typical line-replaceable module, representative of that being designed for next-generation military fighter aircraft, is analyzed to develop a BIT implementation which detects a high percentage of the expected failure of the module.


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    Title :

    Built-in test strategy for next generation military avionic hardware


    Additional title:

    Strategie der eingebauten Pruefeinrichtungen fuer die naechste Generation der militaerischen Avionik-Hardware


    Contributors:


    Publication date :

    1988


    Size :

    7 Seiten, 11 Quellen




    Type of media :

    Conference paper


    Type of material :

    Print


    Language :

    English






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