Analysis and High Performance Parallel Architecture Design for EBCOT in JPEG2000
International conference, Image processing; ICIP ; 2005 ; Genova, Italy
2005-01-01
4 pages
IEEE cat. no. 05CH37687
Conference paper
English
© Metadata Copyright the British Library Board and other contributors. All rights reserved.
Highly Efficient and Parallel VLSI Architecture Design for JPEG2000 of 2D-DWT
British Library Online Contents | 2004
|Design of High Efficient JPEG2000 Bit-Plane Encoder
British Library Online Contents | 2005
|Novel architecture for the JPEG2000 block coder
British Library Online Contents | 2004
|