Advanced design for digital phase-lock loop (DPLL) allows loop gains higher than those used in other designs. Divided into two major components: counterrotation processor and tracking processor. Notable features include use of both phase and rate-of-change-of-phase feedback instead of frequency feedback alone, normalized sine phase extractor, improved method for extracting measured phase, and improved method for "compressing" output rate.
Digital Phase-Locked Loop With Phase And Frequency Feedback
NASA Tech Briefs ; 15 , 11
1991-11-01
Miscellaneous
No indication
English
Graphical Analysis of a Digital Phase-Locked Loop
IEEE | 1979
|The design of an all digital phase-locked loop
Automotive engineering | 1988
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