Under the assumption of negligible quantization error effect and no noise, a nonuniform sampling first-order digital phase-locked loop (DPLL) is analyzed by a graphical method which displays limit cycles and the cycle slipping phenomenon. The analysis suggests an upper bound to the model gain and, consequently, to the pull-in range. Moreover, this method enables one to obtain a closed-form expression of the acquisition time, accurate enough for the cases of practical interest.


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    Title :

    Graphical Analysis of a Digital Phase-Locked Loop


    Contributors:
    Russo, F. (author)


    Publication date :

    1979-01-01


    Size :

    1290071 byte




    Type of media :

    Article (Journal)


    Type of material :

    Electronic Resource


    Language :

    English




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