The efficiency of PCB routing is determined by the quality of the placement of electronic components on the board. The placement of the two-port elements under the BGA-component, although being a local task, is labor-intensive. This paper describes the technique of arranging the decoupling capacitors under the BGA component, including determining the position of the capacitor relative to the matrix pins, positioning and orientation of the capacitor near the equipotential pin of the chip and the sequence of capacitors placement. Formulas that allow estimating the possibility or impossibility of placing the two-port element in a specific position are given. The technique is currently being implemented in the domestic CAD system TopoR.


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    Titel :

    Placement of the decoupling capacitors under the BGA component


    Beteiligte:
    S. A. Sorokin (Autor:in) / O. Yu. Sysoev (Autor:in)


    Erscheinungsdatum :

    2018




    Medientyp :

    Aufsatz (Zeitschrift)


    Format :

    Elektronische Ressource


    Sprache :

    Unbekannt




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