An analysis is presented that forms the basis for an algorithm for calculating the IGBT losses in a power factor correction (PFC) circuit. The method employs experimental data from an off-line test circuit that closely resembles the switching conditions in the actual PFC. This technique provides calculated values of both the conduction and switching losses of the main transistor in a boost-type PFC circuit. Results for a 6 kW PFC are included.<>


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    Titel :

    Computer simulation of IGBT losses in PFC circuits


    Beteiligte:
    Stuart, T.A. (Autor:in) / Shaoyan Ye (Autor:in)


    Erscheinungsdatum :

    01.07.1995


    Format / Umfang :

    513337 byte




    Medientyp :

    Aufsatz (Zeitschrift)


    Format :

    Elektronische Ressource


    Sprache :

    Englisch



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