An analysis is presented that forms the basis for an algorithm for calculating the IGBT losses in a power factor correction (PFC) circuit. The method employs experimental data from an off-line test circuit that closely resembles the switching conditions in the actual PFC. This technique provides calculated values of both the conduction and switching losses of the main transistor in a boost-type PFC circuit. Results for a 6 kW PFC are included.<>
Computer simulation of IGBT losses in PFC circuits
IEEE Transactions on Aerospace and Electronic Systems ; 31 , 3 ; 1167-1173
01.07.1995
513337 byte
Aufsatz (Zeitschrift)
Elektronische Ressource
Englisch
Computer Simulation of IGBT Losses in PFC Circuits
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