The need of a computer in the modern world is inevitable, whose sole purpose is to compute or aid calculations. The need for an Arithmetic Logic Unit (ALU) is as important as the computer, simply because ALU forms the fundamental part of any Central Processing Unit (CPU). And so the encryption of an ALU is highly mandatory for the safety of the device as there are hardly any device without an ALU. This paper deals with the design of an n-bit ALU using a hardware description language, VHDL that is structurally modelled to extend the flexibility and reusability of the device. Moreover, the logic of obfuscation used to enhance its security without compromising on the correct functionality and maximum efficiency of the device is proposed.The results are verified and analysed using FPGAs, which proves the inclusion of the obfuscation module without a considerable increase in area,power overhead of the ALU.


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    Titel :

    Design of Logically Obfuscated n-bit ALU for Enhanced Security


    Beteiligte:
    K, Saravanan (Autor:in) / N, Mohankumar (Autor:in)


    Erscheinungsdatum :

    01.06.2019


    Format / Umfang :

    1579135 byte




    Medientyp :

    Aufsatz (Konferenz)


    Format :

    Elektronische Ressource


    Sprache :

    Englisch



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