In this work, it is presented functional hardware architecture for stereo processing with a modified census transform. Architecture is segmented in image rectification to avoid lens distortion, stereo processing with a modified Census transform and finally post processing using a propagation algorithm to correct false disparity values. Proposed architecture uses minimal hardware and memory requirement in a way that Spartan Low Cost FPGA is used for implementation.


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    Titel :

    Real Time Stereo Vision with a modified Census transform in FPGA




    Erscheinungsdatum :

    01.11.2012


    Format / Umfang :

    516964 byte




    Medientyp :

    Aufsatz (Konferenz)


    Format :

    Elektronische Ressource


    Sprache :

    Englisch




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