The establishment of high-speed connectivity through CubeSats requires innovative solutions to overcome the challenges associated with the development of low-power, high-speed transceivers within the size and mass limitations inherent to CubeSats. Among the most computationally demanding tasks of any transceiver are demodulation and channel decoding, typically requiring a high utilization of hardware resources. This article proposes a channel coding scheme based on low density parity check (LDPC) coding, offering a markedly efficient allocation of resources to address these computational demands. In contrast to traditional LDPC encoding approaches, we develop a simplified algorithm based on an irregular repeat-accumulate (IRA) dual diagonal parity check matrix construction, resulting in an extremely resource-efficient code. The enhanced algorithm efficiently conserves hardware resources through the shared utilization of the parity check bit generator. Moreover, a corresponding low-complexity decoder, based on efficiently combining the Min-Sum (MS) algorithm and the Bit-Flipping (BF) algorithm, which employs the Log-Likelihood Ratio (LLR) is proposed.. We obtain the mathematical closed-form expression for the bit error rate (BER) of the proposed scheme and verify it against simulations, showing a very close match. The proposed scheme achieves high code rate, 3/4, and data rate, 30 Mbps, with a smaller number of decoding iterations, 10, while achieving better BER performance compared to various existing algorithms. Compared to the channel coding schemes currently being employed by CubeSats, our scheme demonstrates the highest information rate, the lowest number of decoding iterations and the highest efficiency.
Dual Diagonal LDPC: A Resource-Efficient Channel Coding Scheme for CubeSat Applications
IEEE Transactions on Aerospace and Electronic Systems ; 61 , 3 ; 7767-7786
01.06.2025
2752345 byte
Aufsatz (Zeitschrift)
Elektronische Ressource
Englisch
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