In response to the growing need for high-power inverters and drives with superior power density, efficiency, and reliability, wide bandgap (WBG)-based multilevel inverters (MLIs) are gaining prominence. However, incorporating WBG devices into conventional neutral-point-clamped (NPC) MLIs presents notable challenges, mainly due to their high dv/dt and multiple minor power loops through the neutral point connection. These issues lead to voltage unbalances among the switches and capacitors and increased voltage overshoots in the devices, leading to premature component failures. Recently, a neutral-point-less Xtype (NPL.X) three-level inverter has been proposed that does not require a split dc-link capacitor and neutral point connection. The removal of neutral point connections eliminates unnecessary minor power loops, leading to minimal high-frequency (HF) power loop inductance. This paper investigates the influence of HF power loop inductance on the NPL.X in comparison with the conventional three-level NPC inverter. The preliminary simulation and analytical study reveal that NPL.X can effectively reduce voltage unbalances and voltage overshoot by 77% and 42%, respectively, compared to the NPC inverter. In addition, 38% reduction in output voltage undershoot has been achieved by the proposed NPL.X.


    Zugriff

    Zugriff prüfen

    Verfügbarkeit in meiner Bibliothek prüfen

    Bestellung bei Subito €


    Exportieren, teilen und zitieren



    Titel :

    Influence of High-frequency Power Loop Inductance on GaN-based Neutral-Point-Less X-type (NPL.X) Three-level Inverter


    Beteiligte:
    Halawa, Ali (Autor:in) / Schuchardt, Ben (Autor:in) / Moon, Jinyeong (Autor:in) / Lee, Woongkul (Autor:in)


    Erscheinungsdatum :

    19.06.2024


    Format / Umfang :

    2115234 byte





    Medientyp :

    Aufsatz (Konferenz)


    Format :

    Elektronische Ressource


    Sprache :

    Englisch



    Operating Principle of Neutral-Point-Less (NPL) Multilevel Inverter Topology: X-type Inverter

    Guven, Musab / Benson, Mikayla / Dong, Xiaofeng et al. | IEEE | 2022


    Neutral-Point-Less (NPL) Multilevel Inverter Topology with Single DC-link Capacitor: H-type Inverter

    Benson, Mikayla / Dong, Xiaofeng / Guven, Musab et al. | IEEE | 2022


    Study of Performance of Balanced Inverter under Influence of Power Loop Stray Inductance

    Tian, Pengkun / Lee, Woongkul / Sarlioglu, Bulent | IEEE | 2020


    HIGH DENSITY LOW INDUCTANCE POWER INVERTER

    ST-JACQUES BENOIT BLANCHARD | Europäisches Patentamt | 2021

    Freier Zugriff

    Adaptive closed‐loop state control system for a three‐level neutral‐point‐clamped Z‐source inverter

    Stempfle, Martin / Bintz, Steffen / Wölfle, Julian et al. | Wiley | 2016

    Freier Zugriff