Scheme devised for asynchronous-message communication system for Mark III hypercube concurrent-processor network. Network consists of up to 1,024 processing elements connected electrically as though were at corners of 10-dimensional cube. Each node contains two Motorola 68020 processors along with Motorola 68881 floating-point processor utilizing up to 4 megabytes of shared dynamic random-access memory. Scheme intended to support applications requiring passage of both polled or solicited and unsolicited messages.
Asynchronous Communication Scheme For Hypercube Computer
NASA Tech Briefs ; 12 , 8
01.09.1988
Sonstige
Keine Angabe
Englisch
Hyperswitch Network For Hypercube Computer
NTRS | 1989
|Image-Processing Software For A Hypercube Computer
NTRS | 1992
|