Binary translation (BT) is the process of converting executable binary from one instruction set architecture (ISA) to another. Accelerated binary translation (XBT) refers to BT using FPGA for hardware acceleration and feeding the target processor at-speed. This work proposes a reconfigurable pipelined structure built on FPGA that performs XBT on different ISAs. An XBT system that translates MIPS to RISC-V is implemented and tested on the Xilinx Zynq platform. Results of several benchmarks show obvious speedup of approximately 48 times compared to an equivalent software approach.


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    Title :

    XBT: FPGA Accelerated Binary Translation


    Contributors:


    Publication date :

    2021-08-16


    Size :

    1077176 byte





    Type of media :

    Conference paper


    Type of material :

    Electronic Resource


    Language :

    English



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